1. Field of the Invention
The present invention relates to a music reproducing device that outputs an audio signal to a headphone.
2. Description of the Related Art
In a headphone output of a music reproducing device that an audio signal to a headphone, there are systems that are called unbalanced and balanced (for example, see JP 2013-005291 A). In an unbalanced system, a three-pole terminal with a diameter of 3.5 mm is used, and an audio signal is transmitted by two kinds of “hot” and “cold”. Meanwhile, in a balanced system, a four-pole terminal with a diameter of 2.5 mm is used, and a signal is transmitted by three kinds of “ground”, “hot” and “cold”. “Cold” is opposite phase of “hot”. In case that external noise occurs, noise of the same phase is superposed on both “cold” and “hot”. By inverting phase of “cold” and mixing inverted “cold” signal with “hot” signal, external noise is cancelled and amplitude of the audio signal becomes twice. For this reason, the balanced system is strong against noise and sound quality is good in the balanced system.
In the music reproducing device having a balanced output, sound quality effect that is different from an unbalanced output of general ground earth is obtained by setting negative (inverted) output of a BTL amplification to ground (=reference potential). Herein, this system is called active control ground (hereinafter, referred as to “ACG”). For example, the ACG can be realized by analog technique that negative side of a balance input terminal is short to ground.
As a digital music reproducing device, a USB DAC “UD-503” made by TEAC CORPORATION has an ACG mode. “UD-503” is dual monaural circuit configuration from a power source section to a digital section and an analog section. Three ways of following may be thought to realize the ACG mode in this configuration.    (1) Negative side input of each of channels is short to ground electrically.    (2) As illustrated in FIG. 5, zero data is inserted to an input signal of each of channels of DACs (D/A converters). The input signal is input to the DACs. In FIG. 5, a normal LR 2 channels audio signal (I2S system) is input from a CPU to a DSP. The DSP sets each of −L channel data and −R channel data to the zero data and inputs the −L channel data and the −R channel data to an amplification circuit. I2S (data 0) illustrated in FIG. 5 is a 2 channels signal of +L channel and −L channel. The −L channel signal is zero data. I2S (data 1) is a 2 channels signal of +R channel and −R channel. The −R channel signal is the zero data.    (3) As illustrated in FIG. 6, negative side volume of each of channels of the DACs is set to zero or is muted. In FIG. 6, a normal LR 2 channels audio signal is input from the CPU to the DSP. I2S (data 0) illustrated in FIG. 6 is a 2 channels signal of +L channel and −L channel. Further, I2S (data 1) is a 2 channels signal of +R channel and −R channel. The CPU sets negative side volume of the DACs to zero or mutes negative side volume of the DACs by I2C.
However, in above (1) to (3), there are following demerits. (1) A circuit for shorting input, a control circuit, a control signal, and a mute function for preventing pop noise are needed. (2) Volume processing by the DSP is needed for an LR 2 channels. (3) Volume operation or mute operation of DAC by I2C from the CPU is needed for 2 channels.